1. Field of the Invention
The present invention relates to an SOI type semiconductor integrated circuit having a plurality of transistors and to a liquid crystal display apparatus to which the SOI type semiconductor integrated circuit is applied.
2. Related Background Art
A substrate having a silicon monocrystal on an insulating substrate is called an SOI (Silicon-on-Insulator) substrate, and is used excellently not only as a substrate for a next-generation high-function and high-performance integrated circuit but also as a TFT (Thin-film Transistor) of a liquid crystal display apparatus. The SOI substrate has been developed from an amorphous SiTFT or Poly-SiTFT substrate which is popularly used at present, and is an ideal TFT substrate. A liquid crystal display apparatus using substantially monocrystalline silicon will be described below.
FIGS. 7A, 7B, and 7C show a liquid crystal display apparatus in which an image display portion and a peripheral drive portion are integrated with each other. FIG. 7A shows a TFT substrate in which the pixel transistor and drive circuit of the liquid crystal display apparatus are integrated. Referring to FIG. 7A, reference numeral 11 denotes a peripheral drive circuit portion, and reference numeral 12 denotes an image display portion. FIG. 7B is a sectional view showing the TFT substrate along a line 7B--7B in FIG. 7A. Referring to FIG. 7B, reference numeral 13 denotes a hollow portion used for making the image display portion 12 transparent. FIG. 7C shows a liquid crystal display apparatus which is completed by using the substrate shown in FIG. 7B as a TFT substrate 1. Referring to FIG. 7C, reference numeral 2 denotes a liquid crystal; 3, a counter substrate 3 opposing the TFT substrate; 4, a spacer for holding a cell gap between the TFT substrate 1 and the counter substrate 3; 5, a potting material for controlling the gap width of the liquid crystal (this potting material 5 is not necessarily used); and 6, a glass for sealing the potting material. In the hollow portion, the silicon substrate is removed, so that the insulating layer of the SOI substrate becomes thin film (like a membrane) to be optically transparent.
The details of the TFT substrate 1 are shown in FIG. 8. The pixel portion 13 corresponding to the display portion of the liquid crystal display apparatus is hollowed out to remove substrate silicon from the pixel portion 13. The peripheral drive circuit portion 11 for driving the pixel portion still has a substrate silicon 41 for keeping the mechanical strength of the peripheral drive circuit portion 11 and shielding the peripheral drive circuit portion 11 from light. For example, assume that a transistor in the pixel portion is a p-type TFT. In this case, the TFT for supplying desired charges to a pixel is formed on an underlying insulating film 42, and is constituted by a p.sup.+ -type source 43, a p.sup.+ -type drain 44, an n well 45, a gate insulating film 46, and a gate electrode 47. A pixel transparent electrode 48 for applying a voltage to the liquid crystal is connected to the p.sup.+ -type drain 44. In order to keep charges which are temporarily written for a long time, it is effective to add a capacity component to the pixel transparent electrode 48. In this case, for example, a pixel common electrode 49 is formed below the pixel transparent electrode 48 through an insulating layer to form a holding capacity therebetween. A transistor in the drive circuit portion is formed on the substrate silicon 41 through the underlying insulating film 42. This transistor, like the TFT of the pixel portion, is also constituted by the p.sup.+ -type source 43, the p.sup.+ -type drain 44, the n well 45, the gate insulating film 46, and the gate electrode 47. Metal electrodes 50 are connected to the terminals of each transistor to form a circuit. The elements are insulated from each other by the first insulating interlayer 51, and the metal electrodes are insulated from each other by a second insulating interlayer 52. A third insulating interlayer 53 serving as a protective film is formed on the surface of the TFT substrate 1.
FIG. 9 is a circuit diagram illustrating part of the drive circuit portion and part of the pixel portion. In this case, an example wherein a video signal is sampled and held and then written is described. A video signal from the video signal line 81 is sampled by a sampling transistor 82 and then stored in a sampling capacitor 83. The stored signal is transferred to a signal line 85 of the pixel portion 13 and supplied to a common source line of a pixel TFT 86 by turning on a transfer transistor 84. The transfer transistor operates in the same manner as in a case wherein a video signal is directly written by the transfer transistor without being sampled and held.
Although not shown in FIGS. 8 and 9, in the thin film transistor formed on the SOI substrate, the volume of the well region is smaller than that of a bulk transistor. Further, the crystallinity is better than that of a poly-Si thin film transistor, so that a carrier lifetime is prolonged. From these canses, a small number of carriers are disadvantageously generated near the drain during an operation of the transistor are stored in the well to excessively change the potential of the well. This change in potential makes the operation of the transistor unstable and decreases the breakdown voltage of the transistor. As a countermeasure against this, a method of forcibly fixing the potential of the well region is effectively used. The plan layout of a p-channel TFT using this countermeasure is shown in FIG. 10A. The region of the thin film silicon is surrounded by a polygon along a b.fwdarw.c.fwdarw.. . . .fwdarw.j.fwdarw.a to form a well contact 45b in a silicon region extended in the longitudinal direction of the gate. As in an ordinary bulk silicon, the potential of the n well is fixed to the maximum potential in the circuit.
Although the p-type TFT is described above, when all the conductivity types are replaced, an n-type TFT may be used like the p-type TFT. In addition, some actual circuit arrangement has both p- and n-type transistors. In order to suppress ionization near the drain, a method of forming an electric field relaxation layer having a density lower than that of the drain between the gate and the drain is effective to increase the breakdown voltage. However, the countermeasure in which only the electric field relaxation layer is arranged in a circuit such as a liquid crystal display apparatus to which a high voltage is applied is not satisfactory.
The monocrystalline silicon transistor is described above. However, when a polysilicon film is formed in the form of an insulating film, a lifetime is prolonged by improving the crystal quality of the polysilicon film. For this reason, the breakdown voltage of the high-quality polysilicon film disadvantageously decreases, and the potential of the n well must be fixed to a specific value.
As described above, when a liquid crystal display is formed by an SOI substrate or a substrate using high-quality polysilicon, a well contact must be formed in each transistor. For this reason, the following problems are posed:
(i) the transistor of the pixel portion increases in area to decrease an opening; and PA1 (ii) in the signal transfer circuit, a threshold value increases due to a substrate bias effect unique to the SOI substrate, so that it is difficult to desirably transfer a signal. PA1 (1) Since signal charges stored in the sampling capacitor are sufficiently transferred to the signal line 85, a white signal (or black signal) for making the contrast of a liquid crystal display satisfactory cannot be displayed. PA1 (2) Since the pixel TFT easily leaks a current when the transistor is in an ON state, a voltage applied to the liquid crystal cannot be kept to be sufficiently high, and a contrast is degraded. PA1 V.sub.DMIN &gt;V.sub.SS +V.sub.th +.DELTA.V.sub.th (when an n-channel transistor is used) PA1 V.sub.DMAX &lt;V.sub.DD +V.sub.th +.DELTA.V.sub.th (when a p-channel transistor is used) PA1 (where V.sub.th is the threshold voltage of a reference transistor; .DELTA.V.sub.th, a change amount of the threshold value of the transistor changed according to claim 1; V.sub.SS, the minimum potential in the circuit, which is the second potential when the transistor whose threshold value is changed is an n-channel transistor and which is the first potential when the transistor whose threshold value is changed is a p-channel transistor; and V.sub.DD, the maximum potential in the circuit, which is the first potential when the transistor whose threshold value is changed is an n-channel transistor and which is the second potential when the transistor whose threshold value is changed is a p-channel transistor). The value .DELTA.V.sub.th is determined depending on the first and second potentials, the thickness of the insulating region, the impurity concentration in the well region, the thickness of the well region, the material of the gate electrode, and the like.
For this reason, in FIG. 8, the threshold value of the transfer transistor 84 must have a margin in a direction in which the threshold value has an absolute value larger than that of a bulk transistor, in order to prevent the threshold value of the pixel TFT 86 from being excessively close to 0 (V) even if the well potential changes. Therefore, when this circuit is used as the drive circuit of the liquid crystal display apparatus, the circuit has the following drawbacks.
Therefore, it is an object of the present invention to provide an SOI type semiconductor integrated circuit including a small-size transistor having a small amount of leakage current and a liquid crystal display apparatus to which the SOI type semiconductor integrated circuit is applied.